The Psion SIBO Serial Protocol

Introduction

The Psion SIBO serial protocol is a proprietary standard for bi-directional serial data transfer between a controlling device and a number of slave devices. The synchronous interface consists of 2 wires CLK and DATA as mentioned earlier:

  • CLK - A clock output from the controller to the slaves. Nominally 3.84 Mhz for memory interfaces or 1.536.Mhz continuous for peripherals.
  • DATA - A bi-directional synchronous data line.

The data is transferred using a series of 12 bit frames including 8 data bits each. This equates to a theoretical maximum data transfer rate of approximately 312 Kbytes/second. Other bits of the frame contain control information. The "system" is generically defined by 2 protocol layers:

  • The Physical layer defining the hardware interface and frame structure.
  • The Transport layer defines system control and register transfers between the controller and the slaves.

Using this system, a large number of higher level implementations can be defined. In normal use the controller will communicate to slaves in a point to point configuration. Multidrop configurations with a number of slaves attached to one channel of the controller are also supported.

As indicated in the previous chapter, the SIBO serial protocol controller circuitry resides in either an ASIC2 or an ASIC9 depending on the particular Psion hardware platform. The S3a and Workabout employ ASIC9 whereas the HC, MC and S3 use ASIC2.

Hardware Interface

As indicated above, the SIBO serial protocol consists of two lines that switch at 5V CMOS voltage levels:

Clock Line

This line is used to synchronously clock data between the controller and slaves. It is always output from the controller circuitry that resides in ASIC2/ASIC9. The clock should only be active during the transfer of data or when the serial channel is continuous clocking mode (used by ASIC5). At all other times it is tri-state pulled low.

Clock Timing Parameters

Symbol Parameter Min Typ Max Units
Tckh Width of clock high 65 130 - nSec
Tckl Width of clock low 130 130 - nSec
Tcyc Cycle time of clock 195 260 - nSec
Fck Clock Frequency   3.84 5.12 MHz

Data Line

This is a bi-directional line used to transfer data synchronously between the controller and slaves. The direction of the data line is not determined by the physical layer but by the control information in the transport layer. This is described in the next section. When no data transfers are in progress the data line is always set to input on both the controller and slaves. This line is pulled low. Data is changed on the falling edge of clock by the transmit device and latched into the receiving device on the rising edge of the clock.

The Physical Layer

This section specifies the low level protocol of the SIBO serial protocol. The physical layer protocol consists of a series of 12 bit frames. There are four types of frames:

  • Null frames - Transmitted by controller to synchronise slaves.
  • Control frames - Control information transmitted by controller to slaves.
  • Data output frames - Data frame transmitted by controller to slaves.
  • Data input frames - Data frame received by controller from a slave.

Frame structure

All 12 bit frames have the following structure:

Bit 0 1 2 3 4 5 6 7 8 9 10 11
Name ST CTL I1 D0 D1 D2 D3 D4 D5 D6 D7 I2
ST Start bit. This bit goes high to indicate the start of a valid frame.
CTL Control bit. When low indicates this is a control frame. High indicates a data frame.
I1 Idle bit. Used to turn around direction of data line. Normally Low.
D0-D7 Data bits.
I2 Idle bit. Used to turn around direction of data line. Normally Low.

Frame Types

Null Frame

This is a special frame transmitted by the controller to ensure all slaves are synchronised. It is generated by transmitting 12 clock pulses with the data line set to input. Since the data line is pulled low this results in 12 zeroes being transmitted.

Control Frame

This frame is transmitted from the controller to one or more slaves. The data line is an output from the controller throughout the whole frame. The bits in the frame have the following value in a control frame:

ST Start Bit This bit goes high to indicate the start of a valid frame.
CTL Control Bit Low to indicate this is a control frame.
I1 Idle Bit Set low.
D0-D7 Data Bits 8 bits of control information.
I2 Idle Bit Set low.

Data Output Frame

This frame is transmitted from the controller to one or more slaves. The data line is an output from the controller throughout the whole frame. The bits in the frame have the following value in a data output frame:

ST Start Bit This bit goes high to indicate the start of a valid frame.
CTL Control Bit High to indicate this is a data frame.
I1 Idle Bit Set low.
D0-D7 Data Bits 8 bits of control information.
I2 Idle Bit Set low.

Data Input Frame

This frame is received by the controller from a slave. The data line is an output from the controller for cycles 1 and 2 and input to the controller for cycles 4 to 11. The bits in the frame have the following value in a data input frame:

ST Start Bit

Output from controller. This bit goes high to indicate the start of a valid frame.

CTL Control Bit

Output from controller. High to indicate this is a data frame.

I1 Idle Bit

Used to turn around direction of data line. Both controller and slave should tri-state the data line during this bit. This bit should be low due to pull down resistor on data line. The controller changes the data line from output to input at the end of cycle 2. The slave changes the data line from input to output at the start of cycle 4.

D0-D7 Data Bits

Output from slave 8 bits of data transmitted by slave. Controller sets data
line to input during these bits.

I2 Idle Bit

Used to turn around direction of data line. Both controller and slave should tri-state the data line during this bit. This bit should be low due to pull down resistor on data line. The slave changes the data line from output to input at the end of cycle 11.

Data Line Direction

The following table summarises the direction of the data line.

Controller CK DATA CK DATA
Outside Frame T I I I
Null frame O I I I
Control Frame O O I I
Data output from controller:        
Cycles 1-2 O O I I
Cycle 3 O I I I
Cycles 4-11 O I I O
Cycle 12 O I I I

Key:

  • T Tri-state
  • I Input
  • O Output

The Transport layer

This section specifies the transport level protocol that operates above the SIBO serial communication physical layer. The transport layer protocol controls the serial communication between the SIBO Protocol Controller (SPC) and a number of SIBO Protocol Slave (SPS) devices. The following rules apply:

  1. The interface is controlled by the writing of control bytes from the controller to the slaves. Control bytes cannot be written by the slaves. Unsolicited data cannot be sent from the slave to the controller.
  2. The controlling device contains two registers to communicate to the slaves. These are the control register (byte, write only) and the Data register (byte or word, read/write). Control bytes are transmitted to the slaves by writing to the control register.

The format of the control byte is as follows:

Bit 7 6 5 4 3 2 1 0
Name S x x x x x x x

The control word can have 2 distinct formats depending on the setting of bit 7 the Select (S) bit:-

Select Bit Description
0 This is the slave select mode. This mode is for selecting, deselecting and resetting slaves.
1 This is the slave control mode. This mode is for communicating with a slave which has been previously selected using the select slave command.

Slave select mode

The format of the slave select byte is as follows:-

Bit 7 6 5 4 3 2 1 0
Name 0 R I I I I I I

Key:-

  • R single reset bit.
  • IIIIII 6 bit ID field.

The 6 bit ID field is a property only of the slave. No slave may have an ID of zero, hence there can be 63 different slaves connected to one controller. The reset bit (R) controls whether the slave(s) are selected or reset. If R = 0 slave(s) are reset, R = 1 slave(s) are selected. Slave select control bytes can be summarised by the following table:-

S R ID Description
0 0 0 Reset all slaves
0 0 xx<>0  Reset specific slave with ID = xx
0 1 0 Deselect slave (does not reset slave)
0 1 xx<>0 Select slave with ID=xx and read slave info (see below).

The Reset function is dependant on the slave. It would normally put the slave into a known passive reset state.

Select Slave with ID=xx (S=0,R=1)

This is a special command that causes a slave with ID=xx to transmit to the controller an 8 bit information field. This field depends entirely on the slave but must be non zero. A reply of 0 indicates that there is no slave of the requested ID present.

Slave control mode

This mode is for communicating with a slave which has been previously selected using the select slave command described above. The format of the control word in slave select mode is as follows:-

Bit 7 6 5 4 3 2 1 0
Name 1 R/W B/W S/M x x x x

Key

  • R/W Read/write select. 0 = write, 1 = read
  • B/W Data transfer size. 0 = 1 byte transfer, 1 = word (2 byte transfer).
  • S/M Single/Multi transfer mode. 0 = single, 1 = multibyte.
  • XXXX = 4 bits of data to slave.

Note the meaning of the 4 bits of data (XXXX) is entirely dependent on the slave. The settings of R/W,B/W,S/M bits in the control word determine the size, type and direction of subsequent data transfers in the following manner:-

R/W B/W S/M Dexcription
0 0 0 Write a single byte to slave
0 0 1 Write a number of single bytes to slave
0 1 0 Write a byte pair to slave (not implemented)
0 1 1 Write a number of byte pairs to slave (not implemented)
1 0 0 Read a single byte from slave
1 0 1 Read a number of single bytes from slave
1 1 0 Read a byte pair from slave (not implemented)
1 1 1 Read a number of byte pairs from slave (not implemented)

Write a single byte

This command readies the currently selected slave to receive a byte of data and sets up the controller so that the next byte (or the LSB of a word) written to its data register will be transmitted to that slave. Anything further written to the controller's data register will have no effect.

Write a number of single bytes

This command readies the currently selected slave to receive a number of sequential bytes of data. The slave will expect to receive data bytes until another control byte is received. The controller is set up so that the next byte (or the LSB of a word) written to its data register will be transmitted to that slave. All subsequent bytes written to the controller's data register will be transmitted to the slave. This will continue until another byte is written to the controller's control register.

Write a byte pair

This command readies the currently selected slave to receive two bytes of data and sets up the controller so that the next word written to its data register will be transmitted to that slave (LSB first). Anything further written to the controller's data register will have no effect.

Write a number of byte pairs

This command readies the currently selected slave to receive a number of sequential byte pairs of data. The slave will expect to receive byte pairs until another control byte is received. The controller is set up so that the next word written to its data register will be transmitted to that slave (LSB first). All subsequent words written to the controller's data register will be transmitted to the slave. This will continue until another byte is written to the controller's control register.

Read a single byte

This command triggers a byte to be transmitted from the selected slave to the controller. This byte can then be read from the LSB of the controller's data register. Further reads of the controller's data register will return the same data but have no effect on the protocol.

Read a number of single bytes

This command triggers a byte to be transmitted from the selected slave to the controller. This byte can then be read from the LSB of the data register. This read will trigger the next byte to be transmitted to the data register of the controller. All subsequent reads of the controller's data register will trigger further bytes to be transmitted to the controller. This will continue until another byte is written to the controller's control register.

Read a byte pair

This command triggers a byte pair to be transmitted from the selected slave to the controller. This word can then be read from the controller's data register. Further reads of the controller's data register will return the same data but have no effect on the protocol.

Read a number of byte pairs

This command triggers a byte pair to be transmitted from the selected slave to the controller. This word can then be read from the controller's data register. This read will trigger the next byte pair to be transmitted to the data register of the controller. All subsequent reads of the controller's data register will trigger further byte pairs to be transmitted to the controller. This will continue until another byte is written to the controller's control register.

Timing

The time taken for commands to be processed and data sent is shown below. The time is given in SIBO pack protocol clock cycles. The length of a clock cycle is nominally 260 nanoseconds for a clock frequency of 3.84 MHz.

Receive and process the control byte  12 cycles
Byte transfer to or from slave 12 cycles
Byte pair transfer to or from slave 24 cycles

When writing to the controller's data and control registers the following rules apply:

  • After writing to the control register there must be a delay of at least 12 cycles before the data register is accessed or another control word is written.
  • To read a word from the data register after the command to read byte pair is issued there must a delay of at least 12 (for control byte)+24 (for the byte pair transfer)= 36 cycles.
  • To perform a multiple byte pair write there must be a delay of at least 12 cycles after the command is written to the control register before the first word can be written to the data register and a delay of at least 24 cycles between subsequent writes to the data register.

States

A slave can be in one of 5 states. Note a control byte can be received and interpreted at any time.

  1. Waiting to receive a data byte or control byte
  2. Waiting to receive a data byte pair or control byte
  3. Waiting to transmit a data byte or control byte
  4. Waiting to transmit a data byte pair or control byte
  5. Waiting to receive control byte only

Revision #4
Created Thu, Nov 8, 2018 9:37 AM by Alex
Updated Sun, Jun 2, 2019 10:32 AM by Alex